Join Accellera at DVCon U.S. 2026

Join us at the upcoming Design and Verification Conference (DVCon) from March 2-5 at the Hyatt Regency Santa Clara. We'll be featuring a tutorial and informative workshops presented by our working group leaders, and we'll also be hosting a reception on the first evening of the conference for all attendees and exhibitors.

The following Accellera-sponsored DVCon events are open to registered DVCon attendees (these events are not part of the free registration option).

Monday, March 2

Portable Stimulus Modeling Patterns (Practical Tips for Adopting PSS)

9:00-10:30am, Grand Ballroom D

This workshop will equip attendees with a deeper understanding of PSS fundamentals and demonstrate how to apply it to real-world verification challenges. Through practical examples, participants will learn how PSS can revitalize legacy flows, streamline test creation, and unlock new capabilities for system-level verification.

The SystemVerilog Mixed-Signal Interface Standard: I Love it When a Plan Comes Together

11:00am-12:30pm, Grand Ballroom D

This technical session will provide attendees with an in-depth look at the proposed SystemVerilog Mixed-Signal Interface (SV-MSI) Standard adapter mechanism and provide examples of how users and tools can take advantage of this new functionality to simplify mixed-signal and real-number modeling in SystemVerilog.

Evening Reception

5:00-6:00pm, Grand Ballroom/Exhibit Hall

Join us to celebrate exciting developments at Accellera and enjoy prize drawings for attendees.

Thursday, March 5

Breakthrough in CDC-RDC Verification Defining a Standard for Interoperable Abstract Model

9:00am-12:30pm, Grand Ballroom D

This tutorial will review CDC-RDC fundamental concepts and constraints, outline the reference verification flow, and describe the goals, scope, structure, and deliverables of the Accellera CDC Working Group. Attendees will gain insight into the development of the standard abstract model and its intended usage.

IP-XACT Demystified: In-Depth Training on the IEEE 1685-2022 IP-XACT Standard

1:30-3:00pm | Grand Ballroom D

This training workshop provides participants with a practical understanding of IP- XACT 2022 and how to apply it in real SoC projects.

For a complete program schedule, including exhibition hours, visit the DVCon U.S. 2026 website.