Congratulations Shrenik Mehta, Recipient of the 2016 Accellera Leadership Award
Shrenik Mehta is the recipient of the 2016 Accellera Leadership Award. The award recognizes his vision, leadership and contribution to standards development, governance and promotional activities of the organization. Shrenik has more than 30 years of semiconductor and system industry experience. In addition to being a founding board member of the Accellera Organization in 2000, he was also vice chair from 2002-2005 and chair from 2005-2010. He is a current member of the Accellera Promotions Committee and an active participant in the Portable Stimulus Working Group. Shrenik helped guide several initiatives within Accellera that evolved into widely-used standards such as SystemVerilog, Unified Power Format (UPF) and Universal Verification Methodology (UVM). He was also vice chair of the IEEE 1800-2005 Standard for SystemVerilog Committee. In addition, Shrenik is member of the US Technical Advisory Group - ISO26262 TC32/SC22/WG8 Functional Safety Working Group.
"Shrenik was a founding board member of Accellera, and his leadership had a tremendous impact on Accellera. He was instrumental in the merger between VHDL International (VI) and Open Verilog International (OVI) to create what was to become Accellera."
Shrenik Mehta and Shishpal Rawat, DAC 2016