Verilog Synthesis Interoperability

Links

  • comp.lang.verilog netnews group.
  • Comp.lang.verilog FAQ and archive
  • VHDL Synthesis Interoperability Working group
  • OVI/VSI Design Constraints Working Group
  • Alternate Verilog FAQ
  • Emacs Verilog mode for Xemacs.
    David Bishop
    Last modified: Wed Aug 23 10:50:33 EDT 2000