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• v2.3   (09 Jun 2008): Fixed 8 Mantis issues, and implemented fire output for 10 SVA checkers
• v2.2   (04 Feb 2008): Fixed 13 Mantis issues
• v2.1   (29 Sep 2007): Fixed 28 Mantis issues, including directory renames: sva31a -> sva05, psl11 -> psl05
• v2.0   (01 Jun 2007): VHDL implementation (top 10 OVLs), 17 new checkers, new ovl_* checkers with enable/fire ports.
• v1.8   (03 Nov 2006): Bugfixes.
• v1.7   (21 Jul 2006): Bugfixes. Consistent X-handling and coverage levels. Verilog, SVA & PSL.
• v1.6   (21 Mar 2006): Bugfixes.
• v1.5   (16 Dec 2005): Bugfixed Verilog & SVA implementations, and preliminary PSL.

The old versions of the OVL (Verilog April 2003, VHDL Oct 2002) are not supported by Accellera and are not currently available from its website. However, it is possible to use the latest Accellera Standard OVL library as long as you make the following changes:

• Ensure the port name for assert_implication is consistent (old=antecendent_expr, new=antecedent_expr)
• Ensure the `defines are consistent (e.g. old=ASSERT_INIT_MSG, new=OVL_INIT_MSG)

The following X-checking OVL assertions were never part of the OVL library and have since been replaced.

• assert_never_at_x_or_z (replaced by assert_never_unknown)
• assert_never_go_x_or_z (replaced by assert_never_unknown_async)